{"id":8946,"date":"2011-01-17T17:54:57","date_gmt":"2011-01-18T01:54:57","guid":{"rendered":"http:\/\/tutor.howang.hk\/tag\/?p=8946"},"modified":"2011-01-17T17:54:57","modified_gmt":"2011-01-18T01:54:57","slug":"%e8%a8%88%e7%ae%97%e6%a9%9f%e8%a1%93%e8%aa%9e-cpu%e9%a1%9e-2","status":"publish","type":"post","link":"https:\/\/www.hktutorcity.com\/tag\/%e8%a8%88%e7%ae%97%e6%a9%9f%e8%a1%93%e8%aa%9e-cpu%e9%a1%9e-2\/","title":{"rendered":"\u8a08\u7b97\u6a5f\u8853\u8a9e CPU\u985e"},"content":{"rendered":"


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\n\u8a08\u7b97\u6a5f\u8853\u8a9e CPU\u985e<\/title><br \/>\n<\/head><\/p>\n<p><body><\/p>\n<table width=\"92%\" align=\"center\" border=\"0\" cellpadding=\"0\" cellspacing=\"0\">\n<tbody>\n<tr>\n<td height=\"37\">\n<div align=\"center\">\n<h1><a href=\"http:\/\/tutor.howang.hk\/\"><strong>\u88dc\u7fd2<\/strong><\/a>-\u8a08\u7b97\u6a5f\u8853\u8a9e CPU\u985e<\/h1>\n<\/div>\n<\/td>\n<\/tr>\n<tr>\n<td bgcolor=\"#f7f7f7\" height=\"20\">\n<div align=\"center\">http:\/\/tutor.howang.hk\/-<a href=\"http:\/\/tutor.howang.hk\/\"><strong>\u9999\u6e2f\u88dc\u7fd2\u57ce<\/strong><\/a><strong><\/strong><\/div>\n<\/td>\n<\/tr>\n<tr>\n<td align=\"center\" height=\"1\">\n<hr width=\"95%\" noshade=\"noshade\" size=\"1\" \/><\/td>\n<\/tr>\n<tr>\n<td>\n<div align=\"right\"><\/div>\n<p> <b><a href=\"http:\/\/tutor.howang.hk\/\">\u88dc\u7fd2\u4ecb\u7d39<\/a><\/b>\u8a08\u7b97\u6a5f\u8853\u8a9e CPU\u985e<\/div>\n<div class=\"content\">\n\t\t\t<!-- GGad --><\/p>\n<div class=\"ggad\">\n<dl>\n<dd class=\"ggad1\" style=\"float: left\" >\n<\/dd>\n<dd class=\"ggad1\" style=\"float: right\">\n<\/dd>\n<\/dl><\/div>\n<p>\t\t\t<!-- \/GGad --><\/p>\n<p>\t\t\t\u3000\u3000<\/p>\n<p>3dnow!(3d no waiting)<br \/>\nalu(arithmetic logic unit\uff0c\u7b97\u8853\u908f\u8f2f\u55ae\u5143)<br \/>\nagu(address generation units\uff0c\u5730\u5740\u7522\u6210\u55ae\u5143)<br \/>\nbga(ball grid array\uff0c\u7403\u72c0\u77e9\u9663\u6392\u5217)<br \/>\nbht(branch prediction table\uff0c\u5206\u652f\u9810\u6e2c\u8868)<br \/>\nbpu(branch processing unit\uff0c\u5206\u652f\u8655\u7406\u55ae\u5143)<br \/>\nbrach pediction(\u5206\u652f\u9810\u6e2c)<br \/>\ncmos: complementary metal oxide semiconductor\uff0c\u4e92\u88dc\u91d1\u5c6c\u6c27\u5316\u7269\u534a\u5c0e\u9ad4<br \/>\ncisc(complex instruction set computing\uff0c\u5fa9\u96dc\u6307\u4ee4\u96c6\u8a08\u7b97\u6a5f)<br \/>\nclk(clock cycle\uff0c\u6642\u9418\u5468\u671f)<br \/>\ncob(cache on board\uff0c\u677f\u4e0a\u96c6\u6210\u7de9\u5b58)<br \/>\ncod(cache on die\uff0c\u82af\u7247\u5167\u96c6\u6210\u7de9\u5b58)<br \/>\ncpga(ceramic pin grid array\uff0c\u9676\u74f7\u91dd\u578b\u67f5\u683c\u9663\u5217)<br \/>\ncpu(center processing unit\uff0c\u4e2d\u592e\u8655\u7406\u5668)<br \/>\ndata forwarding(\u6578\u64da\u524d\u9001)<br \/>\ndecode(\u6307\u4ee4\u89e3\u78bc)<br \/>\ndib(dual independent bus\uff0c\u96d9\u7368\u7acb\u7e3d\u7dda)<br \/>\nec(embedded controller\uff0c\u5d4c\u5165\u5f0f\u63a7\u5236\u5668)<br \/>\nembedded chips(\u5d4c\u5165\u5f0f)<br \/>\nepic(explicitly parallel instruction code\uff0c\u5e76\u884c\u6307\u4ee4\u4ee3\u78bc)<br \/>\nfadd(floationg point addition\uff0c\u6d6e\u9ede\u52a0)<br \/>\nfcpga(flip chip pin grid array\uff0c\u53cd\u8f49\u82af\u7247\u91dd\u8173\u67f5\u683c\u9663\u5217)<br \/>\nfdiv(floationg point divide\uff0c\u6d6e\u9ede\u9664)<br \/>\nfemms\uff1afast entry\/exit multimedia state\uff0c\u5feb\u901f\u9032\u5165\/\u9000\u51fa\u591a\u5a92\u9ad4\u72c0\u614b<br \/>\nfft(fast fourier transform\uff0c\u5feb\u901f\u71b1\u6b50\u59c6\u8f49\u63db)<br \/>\nfid(fid\uff1afrequency identify\uff0c\u983b\u7387\u9452\u5225\u865f\u78bc)<br \/>\nfifo(first input first output\uff0c\u5148\u5165\u5148\u51fa\u968a\u5217)<br \/>\nflip-chip(\u82af\u7247\u53cd\u8f49)<br \/>\nflop(floating point operations per second\uff0c\u6d6e\u9ede\u64cd\u4f5c\/\u79d2)<br \/>\nfmul(floationg point multiplication\uff0c\u6d6e\u9ede\u4e58)<br \/>\nfpu(float point unit\uff0c\u6d6e\u9ede\u904b\u7b97\u55ae\u5143)<br \/>\nfsub(floationg point subtraction\uff0c\u6d6e\u9ede\u6e1b)<br \/>\ngvpp(generic visual perception processor\uff0c\u5e38\u898f\u8996\u89ba\u8655\u7406\u5668)<br \/>\nhl-pbga: \u8868\u9762\u9ecf\u8457\uff0c\u9ad8\u8010\u71b1\u3001\u8f15\u8584\u578b\u5851\u81a0\u7403\u72c0\u77e9\u9663\u5c01\u88dd<br \/>\nia(intel architecture\uff0c\u82f1\u7279\u723e\u67b6\u69cb)<br \/>\nicu(instruction control unit\uff0c\u6307\u4ee4\u63a7\u5236\u55ae\u5143)<br \/>\nid\uff1aidentify\uff0c\u9452\u5225\u865f\u78bc<br \/>\nidf(intel developer forum\uff0c\u82f1\u7279\u723e\u958b\u767c\u8005\u8ad6\u58c7)<br \/>\nieu(integer execution units\uff0c\u6574\u6578\u57f7\u884c\u55ae\u5143)<br \/>\nimm: intel mobile module\uff0c \u82f1\u7279\u723e\u79fb\u52d5\u6a21\u584a<br \/>\ninstructions cache\uff0c\u6307\u4ee4\u7de9\u5b58<br \/>\ninstruction coloring(\u6307\u4ee4\u5206\u985e)<br \/>\nipc(instructions per clock cycle\uff0c\u6307\u4ee4\/\u6642\u9418\u5468\u671f)<br \/>\nisa(instruction set architecture\uff0c\u6307\u4ee4\u96c6\u67b6\u69cb)<br \/>\nkni(katmai new instructions\uff0ckatmai\u65b0\u6307\u4ee4\u96c6\uff0c\u5373sse)<br \/>\nlatency(\u6f5b\u4f0f\u671f)<br \/>\nldt(lightning data transport\uff0c\u9583\u96fb\u6578\u64da\u50b3\u8f38\u7e3d\u7dda)<br \/>\nlocal interconnect(\u5c40\u57df\u4e92\u9023) <br \/>\nmesi(modified\uff0c exclusive\uff0c shared\uff0c invalid\uff1a\u4fee\u6539\u3001\u6392\u9664\u3001\u5171\u4eab\u3001\u5ee2\u68c4)<br \/>\nmmx(multimedia extensions\uff0c\u591a\u5a92\u9ad4\u64f4\u5c55\u6307\u4ee4\u96c6)<br \/>\nmmu(multimedia unit\uff0c\u591a\u5a92\u9ad4\u55ae\u5143)<br \/>\nmflops(million floationg point\/second\uff0c\u6bcf\u79d2\u767e\u842c\u500b\u6d6e\u9ede\u64cd\u4f5c)<br \/>\nmhz(million hertz\uff0c\u5146\u8d6b\u8332)<br \/>\nmp(multi- processing\uff0c\u591a\u91cd\u8655\u7406\u5668\u67b6\u69cb)<br \/>\nmps(multiprocessor specification\uff0c\u591a\u91cd\u8655\u7406\u5668\u898f\u8303)<br \/>\nmsrs(model-specific registers\uff0c\u7279\u5225\u6a21\u584a\u5bc4\u5b58\u5668)<br \/>\nnaoc(no-account overclock\uff0c\u7121\u6548\u8d85\u983b)<br \/>\nni\uff1anon\uff0dintel\uff0c\u975e\u82f1\u7279\u723e<br \/>\nolga(organic land grid array\uff0c\u57fa\u677f\u67f5\u683c\u9663\u5217)<br \/>\nooo(out of order\uff0c\u4e82\u5e8f\u57f7\u884c)<br \/>\npga: pin-grid array(\u5f15\u8173\u7db2\u683c\u9663\u5217)\uff0c\u8017\u96fb\u5927<br \/>\npost-risc<br \/>\npr(performance rate\uff0c\u6027\u80fd\u6bd4\u7387)<br \/>\npsn(processor serial numbers\uff0c\u8655\u7406\u5668\u5e8f\u5217\u865f)<br \/>\npib(processor in a box\uff0c\u76d2\u88dd\u8655\u7406\u5668)<br \/>\nppga(plastic pin grid array\uff0c\u5851\u81a0\u91dd\u72c0\u77e9\u9663\u5c01\u88dd)<br \/>\npqfp(plastic quad flat package\uff0c\u5851\u6599\u65b9\u584a\u5e73\u9762\u5c01\u88dd)<br \/>\nraw(read after write\uff0c\u5beb\u540e\u8b80)<br \/>\nregister contention(\u6436\u5360\u5bc4\u5b58\u5668)<br \/>\nregister pressure(\u5bc4\u5b58\u5668\u4e0d\u8db3)<br \/>\nregister renaming(\u5bc4\u5b58\u5668\u91cd\u547d\u540d)<br \/>\nremark(\u82af\u7247\u983b\u7387\u91cd\u6a19\u8b58)<br \/>\nresource contention(\u8cc7\u6e90\u6c96\u7a81)<br \/>\nretirement(\u6307\u4ee4\u5f15\u9000)<br \/>\nrisc(reduced instruction set computing\uff0c\u7cbe\u7c21\u6307\u4ee4\u96c6\u8a08\u7b97\u6a5f)<br \/>\nsec: single edge connector\uff0c\u55ae\u908a\u9023\u63a5\u5668<br \/>\nshallow- trench isolation(\u6dfa\u69fd\u9694\u96e2)<br \/>\nsimd(single instruction multiple data\uff0c\u55ae\u6307\u4ee4\u591a\u6578\u64da\u6d41)<br \/>\nsio2f(fluorided silicon oxide\uff0c\u4e8c\u6c27\u6c1f\u5316\u7845)<br \/>\nsmi(system management interrupt\uff0c\u7cfb\u7d71\u7ba1\u7406\u4e2d\u65b7)<br \/>\nsmm(system management mode\uff0c\u7cfb\u7d71\u7ba1\u7406\u6a21\u5f0f)<br \/>\nsmp(symmetric multi-processing\uff0c\u5c0d\u7a31\u5f0f\u591a\u91cd\u8655\u7406\u67b6\u69cb)<br \/>\nsoi: silicon-on-insulator\uff0c\u7d55\u7de3\u9ad4\u7845\u7247<br \/>\nsonc(system on a chip\uff0c\u7cfb\u7d71\u96c6\u6210\u82af\u7247)<br \/>\nspec(system performance evaluation corporation\uff0c\u7cfb\u7d71\u6027\u80fd\u8a55\u4f30\u6e2c\u8a66)<br \/>\nsqrt(square root calculations\uff0c\u5e73\u65b9\u6839\u8a08\u7b97)<br \/>\nsse(streaming simd extensions\uff0c\u55ae\u4e00\u6307\u4ee4\u591a\u6578\u64da\u6d41\u64f4\u5c55)<br \/>\nsuperscalar(\u8d85\u6a19\u91cf\u9ad4\u7cfb\u7d50\u69cb)<br \/>\ntcp: tape carrier package(\u8584\u819c\u5c01\u88dd)\uff0c\u767c\u71b1\u5c0f<br \/>\nthroughput(\u541e\u5410\u91cf)<br \/>\ntlb(translate look side buffers\uff0c\u7ffb\u8b6f\u65c1\u8996\u7de9\u6c96\u5668)<br \/>\nuswc(uncacheabled speculative write combination\uff0c\u7121\u7de9\u6c96\u96a8\u6a5f\u806f\u5408\u5beb\u64cd\u4f5c)<br \/>\nvalu(vector arithmetic logic unit\uff0c\u5411\u91cf\u7b97\u8853\u908f\u8f2f\u55ae\u5143)<br \/>\nvliw(very long instruction word\uff0c\u8d85\u9577\u6307\u4ee4\u5b57)<br \/>\nvpu(vector permutate unit\uff0c\u5411\u91cf\u6392\u5217\u55ae\u5143)<br \/>\nvpu(vector processing units\uff0c\u5411\u91cf\u8655\u7406\u55ae\u5143\uff0c\u5373\u8655\u7406mmx\u3001sse\u7b49simd\u6307\u4ee4\u7684\u5730\u65b9)<\/p>\n<\/p><\/div>\n<p><!-- \/content --><br \/>\n\t\t\t<b><a href=\"http:\/\/tutor.howang.hk\/\">\u4e0a\u9580\u88dc\u7fd2<\/a><\/b><\/p>\n<div align=\"center\"><\/div>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><\/body><br \/>\n<\/html><\/p>\n","protected":false},"excerpt":{"rendered":"<p><!DOCTYPE html PUBLIC \"-\/\/W3C\/\/DTD XHTML 1.0 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